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Sweep the data-flow wire and edge wording to input and source
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@@ -128,7 +128,7 @@ fn node_registry() -> HashMap<ProtoNodeIdentifier, Vec<RegistryEntry>> {
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.into_iter()
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.map(|entry| (graphene_std::graphic::to_graphic::IDENTIFIER.clone(), entry)),
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);
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// The transitional level bridge: a leveled wire materializes into the legacy
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// The transitional level bridge: a leveled input materializes into the legacy
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// list an unconverted consumer expects. The rows are keyed under the legacy
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// convert identifiers and die with the last legacy consumer.
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node_types.extend(
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@@ -367,7 +367,7 @@ mod tests {
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}
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}
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/// One wire kind: every row consumes and produces record wires. A plain
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/// One input kind: every row consumes and produces records. A plain
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/// io type here would need a bridge adapter, and those are gone.
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#[test]
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fn every_registry_row_is_record_typed() {
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